As electronic circuit designs continue to increase in speed and complexity, it becomes ever more critical to test the developing circuit designs at various stages of development. Hardware emulators provide a means to test complex circuit designs as the designs are being developed. Such emulators typically provide configurable hardware that is controlled by software to perform the functions of a circuit being designed. The circuit design is specified by a set of data that defines the circuit structure and behavior. The emulator is often connected to a "target system," which is the actual circuit with which the circuit design will eventually operate.
Emulators operate under software control. The circuit design is "compiled" to produce the program that controls the emulator. Speed is of the essence in emulators because inevitably the emulator cannot perform the functions of the circuit being emulated as quickly as the actual circuit, itself. It is desirable to operate the emulator at speeds as close as possible to the target operating speed of the emulated circuit for purposes of accurately interfacing the design to external circuits or other devices and to test the circuit for timing problems.
Because an emulator must perform the functionality of a wide range of circuit designs, it should be as flexible as possible. This means the emulation system must contain logic processing hardware that is reusable for different designs. Such an emulation system would contain a large number of general purpose processing elements that are used to indirectly perform the function of the circuit being emulated. For example, a general purpose emulator would process multiple Boolean logic equations to emulate a multiplier circuit rather than use a dedicated hardware multiplier for the same purpose that would then become unusable in the emulation of circuit designs that do not contain any multiplier functions. In order to solve these equations, many gates, or other devices, in the emulator must be provided with signals. Further, the outputs of the gates or other components must be routed efficiently among the various components of the emulator.
Emulators generally are capable of executing at close to real-time speeds. Thus, for example, an emulation of a circuit that attaches to a target system (a bus, for example) can be hooked to the physical bus during testing. Ideally, human designers should have the freedom to design I/O to and from any target interface pin that they desire. This capability should be able to be accomplished without regard for the type of pin being emulated (e.g., input, output, or tristate) and without regard for the pin's location on a physical plug.
Emulation systems are required to support the emulation of designs with large numbers of target interface pins. Each general purpose pin supported in an emulation system required three different signals: input, enable, and output signals. Many target devices have interfaces of 1000 pins or more. This equates to 3000 or more signals, resulting in bulky cables that reduce reliability and make connection to the target system difficult.
In addition, some user designs need to be interfaced to different families of target logic devices. These can include, but are not limited to 3.3 volt and 5 volt logic. A problem with some emulators is that some devices being emulated connect to busses and contain internal resistive devices that take the bus wires to a high or low logic level when all other devices on the bus are in a high impedance state.
Another problem with many emulators occurs when the human designer is debugging a design that may generate activity on the target interface that could damage the target interface or interfere with its correct operation. What is needed is a way to ensure that such damage will not occur.
Yet another problem with many emulators springs from the fact that in some cases it is desirable for the target system to generate clocking for the target hardware. In other cases, it is desirable that the clock signal be an input to the target emulated system. In the early stages of design, the user may want to provide clocking to a static target environment because this mode of operation allows single stepping by the emulator. Later, when the design is more stable, the human designer may want to use the system clock from the target hardware.
In many emulators, the target hardware circuitry provides inputs to the emulated design that come from outputs of registers in the emulator (also called "registered outputs") or that come from the outputs of registers followed by combinational logic. In sampled data systems, such as a time-sliced hardware emulator, it is necessary to treat these inputs differently in order to be able to process the design in only one emulation program cycle, while accurately modeling the design.